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Designing Efficient Source Routing for Mesh Topology Network on Chip Platforms
Publication Type:
Conference/Workshop Paper
Venue:
13th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD 2010)
Abstract
Efficient on-chip communication is very important
for exploiting enormous computing power available on a multicore
chip. Network on Chip (NoC) has emerged as a
competitive candidate for implementing on-chip
communication. Routing algorithms significantly affect the
performance of a NoC. Most of the existing NoC architectural
proposals advocate distributed routing algorithms for building
NoC platforms. Although source routing offers many
advantages, researchers avoided it due to its apparent
disadvantage of larger header size requirement that results in
lower bandwidth utilization. In this paper we make a strong
case for the use of source routing for NoCs, especially for
platforms with small sizes and regular topologies. We present a
methodology to compute application specific efficient paths for
communication among cores with a high degree of load
balancing. The methodology first selects the most appropriate
deadlock free routing algorithm, from a set of routing
algorithms, based on the applications traffic patterns. Then
the selected (possibly adaptive) routing algorithm is used to
compute efficient static paths with the goal of link load
balancing. We demonstrate through simulation based
evaluation that source routing has a potential of achieving
higher performance, for example up to 28% lower latency even
at medium load , as compared to distributed routing. A simple
scheme is proposed for encoding of router ports to reduce the
header overhead. A generic simulator was developed for
evaluation and performance comparison between source
routing and distributed routing. We also designed a router to
support source routing for mesh topology NoC platforms.
Bibtex
@inproceedings{Mubeen1824,
author = {Saad Mubeen and Shashi Kumar},
title = {Designing Efficient Source Routing for Mesh Topology Network on Chip Platforms},
pages = {181--188},
month = {September},
year = {2010},
booktitle = {13th Euromicro Conference on Digital System Design, Architectures, Methods and Tools (DSD 2010)},
publisher = {IEEE},
url = {http://www.es.mdu.se/publications/1824-}
}